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MYSON TECHNOLOGY
MTD907
Ethernet Encoder/decoder and 10BaseT Transceiver with Built-in Waveform Shaper
FEATURES
* * * * * * * * * Pin-out and functionally compatible with Level One LXT907. Built-in UTP waveform shaping function - no external filters required. Integrated Manchester encoder/decoder. 10Base-T compliant transceiver and AUI transceiver. Full duplex capability. Automatic and manual interface selection (AUI/TP). Automatic TP polarity detection and correction. Heartbeat enable/disable function and jabber disable function. Drives 4 LED status indicators.
GENERAL DESCRIPTION
MTD907 is an integrated Ethernet Endec and 10Base-T transceiver with built-in UTP transmission waveform shaping function. The integrated encoder/decoder conforms to IEEE802.3 standards and provides all needed active circuitry with which to interface the majority of IEEE802.3-conforming controllers to either the 10Base-T media or attachment unit interface (AUI). The functions provided by MTD907 include Manchester encoding/decoding, jabber detection, automatic media selection, reception squelch and transmission waveform shaping, automatic UTP polarity detection and correction for the UTP media.
BLOCK DIAGRAM
AUT LBK PAULTE
TPA, TPB MD0, MD1 TXC TXC, TXE CRS, RXC, RXD COL, JAB DSQ LEDR, LEDL, LEDC, LEDT JAB, PLR RLD, RJAB, RCMPT
MODE CONTROL MANCHESTER CODER/ DECODER LINKTEST POLARITY DETECT WAVEFORM SHAPING
AMP TNA, TNB
AC/DC SQUELCH
RDP RDN NTH DOP
COLLISION LOGIC
MEDIA SELECTION AND CONTROL
LED/STATUS LOGIC
AMP DON
REMOTE SIGNALING
AC/DC SQUELCH
DIP, CIP DIN, CIN
TST TRST
TEST LOGIC
XCAL OSC X2 X1
REFERENCE Circuit
This datasheet contains new product information. Myson Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product. MTD907 Revision 4.5 01/23/1997 1/14
MYSON TECHNOLOGY
1.0 PIN CONNECTION
44-pin PLCC
MD1 MD0 NTH CIN CIP VDD1 DON DOP DIN DIP PAU
MTD907
RLD LTE JAB TST TXC TXD TXE X1 X2 COL AUT
7 8 9 10 11 12 13 14 15 16
6
5
4
3
2
1 44 43 42 41 40 39 38 37 36
MTD907 44-pin PLCC
35 34 33 32 31 30
17 29 18 19 20 21 22 23 24 25 26 27 28
RDN RDP DSQ TNB TNA VDD2 VSS2 TP A TP B PLR RJAB
1.0 PIN DESCRIPTIONS
No 1 34 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Symbol VDD1 VDD2 CIP CIN NTH MD0 MD1 RLD LTE JAB TST TXC TXD TXE X1 X2 COL I/O I I I I I O I O I O I I O I O Name Positive Power Supply Collision Input Pair Normal Threshold Mode Selection Remote Link Down Link Test Enabler Jabber Indicator Test Transmit Clock Transmit Data Transmission Enabler Crystal Oscillator Collision Detection Description +5 Volt power supplies. AUI transceiver CI circuit differential input pair. Active high input, selects normal TP input threshold; when NTH=0, the TP input threshold is reduced 4.5dB. Mode selection pins. Determines controller compatibility mode: mode 00 is for AMD, 01 for Intel, 10 for Fujitsu, 11 for NSC. Active high output. Signifies when the remote port is in link down condition. Active high input. Enables the link test when high; when low, disables the TP link test. Active high output. High output indicates jabber condition. Active high input internally pulled low. This pin is used in test mode only. 10 MHz clock output. Should be directly connected to the controller to synchronize transmission operation. Input signal, NRZ data from the controller. Active high input. Enables data transmission and begins jabber timer; should be synchronized with TXC by the controller. Built-in crystal oscillator. A 20 MHz crystal must be connected across these 2 pins or an external clock must be applied to X2 with X1 left open. Output signal; drives controller collision detection input.
MTD907 Revision 4.5 01/23/1997 2/14
LEDR LEDT LEDL LEDC LBK VSS1 TRST RCMPT RXD CRS RXC
MYSON TECHNOLOGY
17 18 AUT LEDR/ JABDIS LEDT/ PWDN LEDL/ LPSS LEDC/ FDX I O I O I O I O I Automatic Port Selection Receive LED, Disable Jabber Transmit LED, Power Down Link LED, Link Pass Collision LED, Full Duplex
MTD907
19
20 21
22 23 33 24 25 26 27 28 29 30 31 32 35 36 37 38 39 40 41 42 43 44
LBK VSS1 VSS2 TRST RCMPT RXD CRS RXC RJAB PLR TPB TPA TNA TNB DSQ RDP RDN PAU DIP DIN DOP DON
I I O O O O O O O O O O I I I I I I O O
Loopback Negative Power Supply Test Mode Reset Remote Compatible Received Data Carrier Sense Received Clock Remote Jabber Polarity Reversal Twisted-pair Transmission Pairs A & B Disable SQE Receive Data Input Pair (TP) Select Port/AUI AUI Reception Pair AUI Transmission Pair
Active high input. When active, MTD907 defaults to the AUI port if the TP link test fails. If driven low, the port selection is determined by the PAU pin. Active low output driver for receiving the LED indicator. The LED 'on'time is extended by at least 80 ms. When externally tied or driven low, disables the internal jabber timer. Active low output driver for LED transmission indicator. The LED 'on'time is extended by at least 80ms. When externally tied or driven low, forces MTD907 into power-down state. Active low output driver for link integrity LED indicator. When externally tied or driven low, forces MTD907 into 'link pass' state. Active low output driver for collision indicator LED. The LED on time is extended by at least 80 ms. When externally tied low, enables MTD907 for full duplex operation by disabling internal TP loopback and TP collision detection functions. Active high input; enables internal loopback mode. Power supply ground. Active high test mode reset signal. Only recognized in test mode (TST pin high) and internally pulled low. Active high output; indicating TP transceiver at the remote end is compatible with remote signaling. Output signal; recovers received data. Should be connected directly to controller. Output signal; detects incoming network traffic. Should be connected directly to controller. Output signal; recovers received clock. Should be connected directly to controller. Active high output signal; indicates when the remote end is in jabber state. Active high output signal; indicates when the TP polarity is reversed. Two differential driver pairs (A and B) for the TP cable. The outputs are pre-equalized, thus no external filters are required. The TPX pins and TNX pins must be shorted together with a 24.9W 1% to match the 100W TP impedance. Active high input. When driven high, selects MTD907 for hub/switch/repeater operation by disabling signal quality test (heartbeat). Differential input pair for TP cable. The reception filter is integrated on-chip. No external filter is required. Recognized only if the AUT pin is low. PAU=1 selects AUI port, PAU=0 selects TP port. It is recommended that you tie this pin to ground if driving AUT pin high. Differential input pair from the AUI transceiver DI circuit. Differential output pair to the AUI transceiver DO circuit.
MTD907 Revision 4.5 01/23/1997 3/14
MYSON TECHNOLOGY
2.0 CONTROLLER COMPATIBILITY MODE DESCRIPTIONS
Mode 1 2 3 4 Controllers: Advanced Micro Devices AM7990 or compatible controllers. Intel 82586 or 82596, or compatible controllers. Fujitsu MB86950 or MB86960, Seeq 8005 or compatible continuous clock-type controllers. National Semiconductor 8390, TI TMS380C26 or compatible controllers. MD0 0 0 1 1
MTD907
MD1 0 1 0 1
3.0 ABSOLUTE MAXIMUM RATINGS
DC Supply Voltage (Vcc) DC Input Voltage (Vin) Storage Temperature Operating Temperature -0.5V to +7V -0.5V to Vcc+0.5V o o -65 C to 150 C o o 0 C to 70 C
4.0 OPERATING CONDITIONS
Parameter Power Supply Voltage Operating Temperature Supply Current Symbol Vcc Top Icc Icc Icc Icc Min 4.75 0 Typ 5 35 60 50 3 Max 5.25 70 55 80 70 6 Unit V C mA mA mA mA
o
Test Conditions
Idle Transmitting on TP Transmitting on AUI Power-down mode
5.0 ELECTRICAL CHARACTERISTICS (under operating conditions)
Parameter Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Output Low Voltage (LED) Output Rise Time (TXC, RXC) Output Fall Time (TXC, RXC) X2 Rise Time (external clock) X2 Duty Cycle (external clock) Symbol VIL VIH VOL VOH VOL TR TR TF TF Min 2.0 2.4 Typ 3 2 3 2 50/50 Max 0.8 0.4 0.7 12 8 12 8 10 40/60 Unit V V V V V ns ns ns ns ns % Test Conditions
Iol=1.6mA Iol=40uA Iol=10mA Cload=20pF TTL load Cload=20pF TTL load
6.0 AUI ELECTRICAL CHARACTERISTICS (under operating conditions)
Parameter Input Low Current Input High Current Differential Output Voltage Differential Squelch Threshold Symbol IL IH VOD VDS Min 550 150 Typ 220 Max -700 500 1200 350 Unit uA uA mV mV Test Conditions
5 MHz square wave
MTD907 Revision 4.5 01/23/1997
4/14
MYSON TECHNOLOGY
7.0 TP ELECTRICAL CHARACTERISTICS (under operating conditions)
Parameter Transmit Output Impedance Peak Differential Output Voltage Transmit Timing Jitter Addition Transmit Timing Jitter Added by MAU and PLS Sections Receive Input Impedance Differential Squelch Threshold Symbol Zout Vod Zin Vds Vds Min 3.3 300 180 Typ 5 3.5 6.4 3.5 20 420 250 Max 3.7 10 5.5 585 345 Unit W V +/ns +/ns kW mV mV
MTD907
Test Conditions Load=100 W Internal MAU After IEEE 802.3specified TP line model Between input pairs 5MHz square wave input, NTH=1 5MHz square wave input, NTH=0
8.0 SWITCHING CHARACTERISTICS (under operating conditions)
Jabber Timing: Parameter Maximum Transmission Time before Jabber Unjab Time Link Integrity Pulse Timing: Parameter Link Loss Time Transmit Link Integrity Timing Receive Link Integrity Pulse Timing Start-of-Frame Timing, AUI Parameter Decoder Acquisition Time CD Turn-on Delay Start-of-Frame Timing, TP Parameter Decoder Acquisition Time CD Turn-on Delay RXC Timing Parameter Receive Data Setup from RXC Receive Data Hold from RXC RXC Shut-off Delay from CRS Assertion RXC Hold after CRS Turn-off RXD Data through Delay CRS Turn-off Delay RXC Switching Delay after CD Off Symbol Min 20 250 Typ Max 150 750 Unit ms ms
Symbol -
Min 63 8 3.1
Typ -
Max 64 24 63
Unit ms ms ms
Symbol tDATA tCD
Min -
Typ 700 50
Max 1100 200
Unit ns ns
Symbol tDATA tCD
Min -
Typ 1000 400
Max 1700 550
Unit ns ns
Symbol tRDS tRDH tSWS tRCH tRD tCRSOFF tSWE
Typ Min. Min. Typ. Max. Max. Typ.
Mode 1
Mode 2
Mode3
Mode 4
Unit ns ns ns bt ns ns ns
43 10 8 400 500 -
30 30 1 375 475 -
30 30 +/-100 375 475 120
30 30 8 375 475 -
MTD907 Revision 4.5 01/23/1997 5/14
MYSON TECHNOLOGY
Transmission Timing Parameter TXE Setup from TXC TXD Setup from TXC TXE Hold from TXC TXD Hold from TXC Transmission Start-up Delay, AUI Transmission Start-up Delay, TP Transmission through Delay, AUI Transmission through Delay, TP COL and Loopback Timing Parameter COL Turn-on Delay COL Turn-off Delay COL (SQE) Delay after TXE Off COL (SQE) Pulse Duration LBK Setup from TXE LBK Hold after TXE Symbol tEHCH tDACH tCHEL tCHDU tSTUD tSTUD tTPD tTPD Min 22 22 5 5 Typ 200 350 Max 450 450 300 350
MTD907
Unit ns ns ns ns ns ns ns ns
Symbol tCOLD tCOLOFF tSQED tSQEP tKHEH tKHEL
Min 0.65 500 10 10
Typ 25 0
Max 500 500 1.6 1500 -
Unit ns ns us ns ns ns
9.0 TIMING DIAGRAM
Mode 1, RXC - Start of Frame Timing
1 TPIP/TPIN or DIP/DIN CRS RXC tDATA RXD 1 0 1 0 1 0 1 0 1 1 1 0 1 tRDS tRDH tCRS 0 1 0 1 0 1 0 1 1 1 0 1 0 0 0 1 0 1 0
Mode 1, RXC - End of Frame Timing
1 TPIP/TPIN or DIP/DIN CRS tRD RXC tRCH RXD 1 0 1 0 1 0 1 0 0 0 1 0 1 0 1 0 0
tCDOFF
MTD907 Revision 4.5 01/23/1997 6/14
MYSON TECHNOLOGY
Mode 1, Transmission Timing
TXE tEHCH TXC tDSCH TXD tSTUD TPO tCHDU tTPD tCHEL
MTD907
Mode 1, Collision Detection Timing
CI COL
tCOLD tCOLOFF
Mode 1, HBT/CI Output Timing
TXE
tSQED
COL
tSQEP
Mode 1, Loopback Timing
LBK TXE CRS tCAEA tKHEH tKHEL
Mode 2, RXC - Start of Frame Timing
1 TPIP/TPIN or DIP/DIN CRS RXC tDATA RXD 1 0 1 0 1 0 1 0 1 1 1 0 1 tRDS tRDH tCRS 0 1 0 1 0 1 0 1 1 1 0 1 0 0 0 1 0 1 0
MTD907 Revision 4.5 01/23/1997 7/14
MYSON TECHNOLOGY
Mode 2, RXC - End of Frame Timing
1 TPIP/TPIN or DIP/DIN CRS tRD RXC tRCH RXD 1 0 1 0 1 0 1 0 0 0 1 0 1 0 1 0 0
MTD907
tCDOFF
Mode 2, Transmission Timing
TXE TXC tEHCH tDSCH TXD tSTUD TPO tTPD tCHDU tCHEL
Mode 2, Collision Detection Timing
CI COL
tCOLD tCOLOFF
Mode 2, HBT/CI Output Timing
TXE
tSQED
COL
tSQEP
Mode 2, Loopback Timing
LBK TXE CRS tKHEH tCAEA tKHEL
MTD907 Revision 4.5 01/23/1997 8/14
MYSON TECHNOLOGY
Mode 3, RXC - Start of Frame Timing
1 TPIP/TPIN or DIP/DIN CRS RXC Generated form TCLK RXD tDATA 1 0 1 tRDS tRDH tCRS tSWS 0 1 0 1 0 1 0 1 1 1 0 1 0 0 0 1 0 1
MTD907
0
Recovered form Input Data Stream
0
1
0
1
0
1
1
1
0
1
Mode 3, RXC - End of Frame Timing
1 TPIP/TPIN or DIP/DIN CRS tRD RXC Recovered Clock tSWE Generated from TXC 0 1 0 1 0 1 0 0
tCDOFF
RXD 1 0 1 0 1 0 1 0 0
Mode 3, Transmission Timing
TXE tEHCH TXC tDSCH TXD tSTUD TPO tCHDU tTPD tCHEL
Mode 3, Collision Detection Timing
CI COL
tCOLD tCOLOFF
MTD907 Revision 4.5 01/23/1997 9/14
MYSON TECHNOLOGY
Mode 3, HBT/CI Output Timing
TXC
tSQED
MTD907
COL
tSQEP
Mode 3, Loopback Timing
LBK TXE CRS tKHEH tCAEA tKHEL
Mode 4, RXC - Start of Frame Timing
1 TPIP/TPIN or DIP/DIN CRS RXC tRDS RXD tDATA 1 0 1 0 1 0 1 0 1 1 1 0 1 tRDH tCRS 0 1 0 1 0 1 0 1 1 1 0 1 0 0 0 1 0 1 0
Mode 4, RXC - End of Frame Timing
1 TPIP/TPIN or DIP/DIN CRS tRD RXC tRCH RXD 1 0 1 0 1 0 1 0 0 0 1 0 1 0 1 0 0
tCDOFF
MTD907 Revision 4.5 01/23/1997 10/14
MYSON TECHNOLOGY
Mode 4, Transmission Timing
TXE tEHCH TXC tDSCH TXD tSTUD TPO tCHDU tTPD tCHEL
MTD907
Mode 4, Collision Detection Timing
CI COL
tCOLD tCOLOFF
Mode 4, HBT/CI Output Timing
TXE
tSQED
COL
tSQEP
Mode 4, Loopback Timing
LBK TXE CRS tCAEA tKHEH tKHEL
10.0 FUNCTIONAL DESCRIPTION
MTD907 is an Ethernet Endec and 10BaseT transceiver with a built-in waveform shaper that performs the Media Attachment Unit (MAU) and Physical Layer Signaling (PLS) functions as defined in the IEEE802.3 specification. MTD907 can function as either a PLS-only device interfacing a supported controller to an AUI cable or as an integrated PLS/MAU interfacing a supported controller to the TP cable. In the following functional descriptions, aII functions are defined as seen from the controller side of the interface. Controller Compatibility MTD907 is configurable for interfacing with common industrial standard Ethernet controllers. The mode selection pins, MD0 and MD1, provide the mode configuration capability as tabulated in Section 2.0. The timing specification of different controller modes is specified in Section 8.0' RXC timing. Applicable timing diagrams s for each of the supported controller modes are included in Section 9.0.
MTD907 Revision 4.5 01/23/1997 11/14
MYSON TECHNOLOGY
MTD907
Transmission Function MTD907 samples TXD data from the controller at the rising edge of the TXC signal and then performs the Manchester encoding on the input data stream. The encoded data is then transmitted through either the AUI port or the TP cable network . The built-in waveform-shaping circuits produce pre-distorted TP output waveform comforming to the jitter template specified in IEEE802.3. No external filter is required in MTD907 applications. If LTE is enabled and the TP port is selected as the network media, MTD907 transmits link integrity test pulses at regular intervals during idle periods. Due to its voltage drive and TP output drivers' low output impedence, the driving end source resistance is decided by external resistors. Jabber Control Function The jabber control function of MTD907 closely follows the IEEE 802.3 specification. The MTD907 built-in watchdog timer prevents the DTE from continuous transmission. When the TXE input is asserted for longer than the time limit, both transmission and loopback functions are disabled, and the JAB output pin will be asserted. Once MTD907 enters the jabber state, it will exit it only if the TXE signal remains idle for a period of 250-750ms. The jabber function of MTD907 can be disabled by externally pulling the LEDR pin low. SQE Function MTD907 supports the signal quality error (SQE) function, which can be disabled through DSQ input. If the SQE function is enabled (DSQ=0), MTD907 will transmit the SQE signal after every successful 10BaseT transmission. This SQE signal will be a 10 +/- 5 bit time assertion of the COL output pin. If the AUI port is selected as the transmission media, the SQE is determined by the external MAU. When using MTD907 in hub or switch applications, the SQE function must be disabled (DSQ=1). Reception Function MTD907' reception function recovers both the clock and data from the incoming Manchester-encoded data s stream from either the AUI or TP port. The recovered clock and data are sent to the controller through the RXC and RXD pins, respectively. Internal filter and squelch functions are integrated in MTD907 in order to discriminate noise from valid TP signals. No external reception filter is needed. If the incoming signal from either the AUI or TP input exceeds the squelch requirements, the CRS pin will be asserted and internal timing recovery circuits will be activated. A fast lock-on PLL will typically lock on to the input signal in 5-bit time. If the input signal drops below the squelch threshold or signal transitions are absent for 8-bit time (typical), the internal circuit will return to its idle state. TP Interface Polarity Correction Function The MTD907 TP interface polarity correction function detects and corrects TP polarity error using both TP link pulses and end-of-frame data. The TP polarity is internally decided as being reversed only if 8 consecutive link pulses or end-of-frame data are received with a polarity opposite to the expected polarity. Upon detecting TP polarity reversal, MTD907 will automatically exchange the received TP data polarity. This correction function is always active. Collision Detection Function The collision detection function is applicable only if MTD907 is used as PLS/MAU in a standard 10BaseT network. A collision is detected if valid data is present simultaneously on both TP transmission and TP reception circuits. MTD907 reports this to the controller via the assertion of the COL output. If MTD907 is used as PLS only, i.e. external MAU, then the collision detection is based on valid signals from the AUI port. If MTD907 is configured to function as a full-duplex TP transceiver by externally pulling the LEDC pin low, the collision detection function for TP will be disabled internally. Also, if the MTD907 LBK pin is driven high, all collision function is disabled. Loopback Function
MTD907 Revision 4.5 01/23/1997 12/14
MYSON TECHNOLOGY
MTD907
MTD907 has 4 different loopback modes. If the TP port and half-duplex mode are selected, MTD907 provides the normal loopback function as defined in 10BaseT standards. If the TP port and full-duplex mode are selected, the internal loopback is disabled, allowing external loopback through TP ports. If the AUI interface is selected and LBK=0, the external AUI loopback mode is in effect. If LBK is driven high, the internal collision detection function is disabled, and the transmission data is forced to loop back through internal Manchester ENDEC with disregard as to which interface port is selected. Link Integrity Test The MTD907 link integrity test is implemented as specified in IEEE802.3 10BaseT standards. This function is enabled when input pin 8 (LTE) is driven high. While LTE=1, MTD907 will recognize link integrity pulses received in absence of a valid TP data packet. If both link integrity pulses and TP data packets are not detected within 65-66ms, MTD907 will enter a link-fail state and will disable the transmission and normal loopback functions. After it enters such a state, MTD907 will exit the link-fail state if one valid TP packet or 2 or more link integrity pulses are received. Link integrity pulses received within an interval of 4ms will be ignored by MTD907. Remote Signaling The link integrity pulses transmitted by MTD907 include encoded local status information by varying the link pulse intervals. This feature is implemented in such a way that MTD907 is compatible with any chip that uses the same signaling scheme, such as many of the Level One products. Three different pieces of status information are encoded and are described as follows. Local link-down is encoded as link pulse interval sequences of 10ms-15ms-20ms. Local jabber is encoded as link pulse interval sequences of 10ms-20ms-15ms. Remote-signaling capability is encoded as a link pulse interval sequence of 10ms-20ms. MTD907 will detect and decode link pulses, thus encoding and reporting them through the RLD, RJAB and RCMPT output pins, respectively.
11.0 Comparison of MTD907 and Level One LXT901/LXT907
Waveform Synthesis Method The main difference between MTD907 and Level One LXT901/LXT907 is the waveform synthesis method used. Level One products use a table-look-up method with a 5-bit DAC operating at 70MHz. MTD907 uses a delay cell based 16-tab FIR filter operating at 160MHz to synthesize the pre-distorted transmission waveforms required by 10BaseT standards with much refined waveform. Mode1 and Mode4 End-of-Frame RXC Timing Eight end-of-frame RXC pulses are provided for better controller interfacing for Mode1 and Mode 4 style timing. MTD907 vs LXT901 These 2 devices share the same functionality except for Pin 37. LXT901 uses this pin as a UTP/STP selection input while MTD907 uses this pin as DSQ to disable or enable the built-in SQE function. For typical LXT901 UTP applications, this pin is tied high in order to select UTP interface. For these applications, MTD907 should be a drop-in replacement for LXT901 if the attached controller does not check the SQE signal. MTD907 vs LXT907 The only noticeable difference between these 2 devices is that when LXT907 enters the power-down mode, it will drive the LEDL low periodically, while MTD907 disables all output pins once forced into the power-down mode.
MTD907 Revision 4.5 01/23/1997 13/14
MYSON TECHNOLOGY
12.0 APPLICATIONS
Please see the attached application schematics.
MTD907
13.0 PACKAGE DIMENSION
44 PIN PLCC Unit: Inch
0.045*45 0 PIN #1 HOLE 0.180 MAX. 0.020 MIN.
0.013~0.021 TYP. 0.690 +/-0.005 0.610 +/-0.02 0.653 +/-0.003 0.500
70TYP. 0.010 0.050 TYP. 0.026~0.032 TYP. 0.653 +/-0.003 0.6902 +/-0.005 0.070 0.070
MTD907 Revision 4.5 01/23/1997 14/14

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